The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 2010

Filed:

May. 26, 2009
Applicants:

Masahiko Sagisaka, Kyoto, JP;

Hisashi Adachi, Osaka, JP;

Taiji Akizuki, Miyagi, JP;

Inventors:

Masahiko Sagisaka, Kyoto, JP;

Hisashi Adachi, Osaka, JP;

Taiji Akizuki, Miyagi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/13 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clock signal generation apparatus containing variable delay devices for varying the delay time of two-phase clock signals used in a load circuit that uses non-overlap clock signals; a non-overlap detector for detecting a non-overlap time in the H-level zones of the two-phase clock signals and outputting a detection signal corresponding to the non-overlap time; and a control signal generation section for generating a control signal that is used to control the variable delay devices on the basis of the detection signal from the non-overlap detector, and capable of securely generating the two-phase clock signals having an optimal non-overlap time while absorbing fluctuations due to temperature characteristics, power supply voltage characteristics and individual differences in components.


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