The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 2010

Filed:

Nov. 12, 2008
Applicants:

Chai Yee Teng, Sarikei, MY;

Ket Chiew Sia, Bayan Lepas, MY;

Inventors:

Chai Yee Teng, Sarikei, MY;

Ket Chiew Sia, Bayan Lepas, MY;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/094 (2006.01); H03K 19/0175 (2006.01);
U.S. Cl.
CPC ...
Abstract

A buffer circuit for using one buffer for multiple differential I/O standards is disclosed. The buffer circuit includes a differential input buffer. The first input of the differential input buffer may receive an input and the second input is coupled to a switch. The switch may be a one-time-programmable switch. The switch has a coupling to transmit a signal to the second input of the differential input buffer. The switch may be programmed to selectively transmit different signals to the differential input buffer. The first input terminal of the switch may receive an inverted version of the input signal and the second input terminal of the switch may receive a reference voltage. The buffer may transmit an LVDS signal or an SSTL signal or an HSTL signal. Using one differential buffer for multiple I/O standards may reduce the overall die size and may save space on the die.


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