The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2010
Filed:
Jul. 12, 2007
Sankaranarayanan Srinivasan, San Jose, CA (US);
Kamal Chaudhary, San Jose, CA (US);
Amit Singh, San Jose, CA (US);
Benoit Payette, Blainville, CA;
Sankaranarayanan Srinivasan, San Jose, CA (US);
Kamal Chaudhary, San Jose, CA (US);
Amit Singh, San Jose, CA (US);
Benoit Payette, Blainville, CA;
Xilinx, Inc., San Jose, CA (US);
Abstract
A method of implementing a circuit design for a target device can include assigning load pins of a high fanout signal of a placed circuit design into a plurality of windows according to a location of each load pin on the target device. A source of the high fanout signal can be replicated, wherein each window is associated with a source of the high fanout signal. For each source of the high fanout signal, the source can be connected to load pins of the window associated with the source and the source can be placed within the window associated with the source. The placed circuit design can be output.