The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2010
Filed:
Aug. 03, 2006
James A. Walstrum, Jr., San Jose, CA (US);
Mark A. Moran, Milpitas, CA (US);
Jinsong Oliver Huang, San Jose, CA (US);
Patrick J. Crotty, San Jose, CA (US);
James A. Walstrum, Jr., San Jose, CA (US);
Mark A. Moran, Milpitas, CA (US);
Jinsong Oliver Huang, San Jose, CA (US);
Patrick J. Crotty, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
An integrated circuit () includes a suspend circuit that includes a first input to receive a suspend signal, a first output to generate an awake signal, and outputs to provide control signals to various integrated circuit resources. During suspend mode, the suspend circuit suspends operation of the integrated circuit resources by driving its output pins to one of a plurality of predefined state selected by corresponding mode select signals and by locking its synchronous elements to known states. Upon termination of suspend mode, the circuit re-activates the integrated circuit resources according to a user-defined timing schedule. The user-defined timing schedule and the mode select signals may be provided to the integrated circuit during its configuration as part of a configuration bitstream.