The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2010
Filed:
May. 12, 2006
Alvin Y. Ching, Sunnyvale, CA (US);
Jennifer Wong, Fremont, CA (US);
Bernard J. New, Carmel Valley, CA (US);
James M. Simkins, Park City, UT (US);
John M. Thendean, Berkeley, CA (US);
Anna Wing Wah Wong, Santa Clara, CA (US);
Vasisht Mantra Vadi, San Jose, CA (US);
Alvin Y. Ching, Sunnyvale, CA (US);
Jennifer Wong, Fremont, CA (US);
Bernard J. New, Carmel Valley, CA (US);
James M. Simkins, Park City, UT (US);
John M. Thendean, Berkeley, CA (US);
Anna Wing Wah Wong, Santa Clara, CA (US);
Vasisht Mantra Vadi, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A physical floorplan for a digital signal processing (DSP) block including; an interconnect column having a plurality of programmable interconnect elements; a first DSP element having a plurality of first columns, a first output register column of the plurality of first columns positioned adjacent to the interconnect column; and a second DSP element, having a plurality of second columns a second output register column of the plurality of second columns positioned adjacent to the interconnect column.