The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2010

Filed:

Jul. 07, 2006
Applicants:

Thomas B. Cho, Fremont, CA (US);

Dong Chen, Sunnyvale, CA (US);

Inventors:

Thomas B. Cho, Fremont, CA (US);

Dong Chen, Sunnyvale, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/153 (2006.01);
U.S. Cl.
CPC ...
Abstract

A comparator circuit includes a bias stage, a first current source, a second current source, and a comparator stage. The bias stage includes a first input, a second input, an output that generates a bias voltage, and a first load, wherein differential reference voltages are applied to the first and second inputs. The first current source generates a bias current based on the bias voltage and inputs the bias current to the bias stage. The second current source generates the bias current based on the bias voltage. The comparator stage communicates with the second current source and includes a first input, a second input, and a second load, wherein differential input voltages are applied to the first and second inputs of the comparator stage. The comparator circuit compares the differential input voltages to the differential reference voltages based on the bias current, the first load, and the second load.


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