The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2010
Filed:
Jul. 12, 2006
Julian William Gardner, Kineton, GB;
Florin Udrea, Cambridge, GB;
Takao Iwaki, Aichi, JP;
James Anthony Covington, Sutton Coldfield, GB;
Julian William Gardner, Kineton, GB;
Florin Udrea, Cambridge, GB;
Takao Iwaki, Aichi, JP;
James Anthony Covington, Sutton Coldfield, GB;
University of Warwick, Warwickshire, GB;
Abstract
A gas-sensing semiconductor device' is fabricated on a silicon substrate′ having a thin silicon dioxide insulating layer′ in which a resistive heatermade of doped single crystal silicon formed simultaneously with source and drain regions of CMOS circuitry is embedded. The device′ includes a sensing area provided with a gas-sensitive layer′ separated from the heater′ by an insulating layer′. As one of the final fabrication steps, the substrate′ is back-etched so as to form a thin membrane in the sensing area. The heater′ has a generally circular-shaped structure surrounding a heat spreading plate′, and consists of two setsof meandering resistors having arcuate portions nested within one another and interconnected in labyrinthine form. The fabrication of the heater at the same time as the source and drain regions of CMOS circuitry is particularly advantageous in that the gas-sensing semiconductor device is produced without requiring any fabrication steps in addition to those already employed in the IC processing apart from a post-CMOS back etch and deposition of the gas-sensitive layer. The circular design is advantageous in that it is the best solution to minimise the size of the membrane at fixed power loss and heated area.