The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2010
Filed:
Jun. 09, 2008
Bosco Chun Sang Lai, Markham, CA;
Sunny Lai-ming Chang, Markham, CA;
Hong Liang Chan, Markham, CA;
Yu Kuen Lam, Toronto, CA;
Lawrence Wai Cheung Ho, Mississauga, CA;
Bosco Chun Sang Lai, Markham, CA;
Sunny Lai-Ming Chang, Markham, CA;
Hong Liang Chan, Markham, CA;
Yu Kuen Lam, Toronto, CA;
Lawrence Wai Cheung Ho, Mississauga, CA;
KingTiger Technology (Canada) Inc., Markham, Ontario, CA;
Abstract
Embodiments described herein relate to systems and methods for testing integrated circuit devices within an environment that is representative of the application environment in which an integrated circuit device will be used. In at least one embodiment, the testing system comprises a second reference integrated circuit device that provides flexibility in testing, allowing only the input to a first reference integrated circuit device of an application system to be tapped and not necessarily both input to and output from the first reference integrated circuit device to be tapped. In some embodiments, the input to the first reference integrated circuit device may be subsequently modified by a controller. The controller is configured to tap first test data transmitted to the first reference integrated circuit device of the application system, and transmit second test data to both the second reference integrated circuit device and at least one integrated circuit device under test, the second test data comprising at least a portion of the first test data. Reference response data received from the second reference integrated circuit device may then be compared with output from the at least one integrated circuit device under test.