The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2010

Filed:

Sep. 28, 2007
Applicants:

Jose Cabanillas, San Diego, CA (US);

Prasad S. Gudem, San Diego, CA (US);

Sai Chong Kwok, Escondido, CA (US);

David Love, San Diego, CA (US);

Inventors:

Jose Cabanillas, San Diego, CA (US);

Prasad S. Gudem, San Diego, CA (US);

Sai Chong Kwok, Escondido, CA (US);

David Love, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/46 (2006.01);
U.S. Cl.
CPC ...
Abstract

Techniques for attenuating undesired signal components from a differential duplexer are described. The duplexer provides a differential received signal at RX+ and RX− ports. This differential received signal includes an undesired common mode signal, which may come from a transmit signal. The common mode signal is attenuated with a common mode trap in an impedance matching network coupled to the RX+ and RX− ports. The matching network includes a first passive circuit coupled between the RX+ port and a first node, a second passive circuit coupled between the RX− port and a second node, and the common mode trap coupled between the first and second nodes. In one design, the common mode trap includes a first inductor coupled between the first node and a common node, a second inductor coupled between the second node and the common node, and a capacitor coupled between the common node and circuit ground.


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