The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2010
Filed:
Nov. 24, 2008
Dennis E. Dudeck, Hazleton, PA (US);
Donald Albert Evans, Lancaster, OH (US);
Hai Quang Pham, Hatfield, PA (US);
Wayne E. Werner, Coopersburg, PA (US);
Ronald James Wozniak, Whitehall, PA (US);
Dennis E. Dudeck, Hazleton, PA (US);
Donald Albert Evans, Lancaster, OH (US);
Hai Quang Pham, Hatfield, PA (US);
Wayne E. Werner, Coopersburg, PA (US);
Ronald James Wozniak, Whitehall, PA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
A memory circuit having reduced power consumption includes a plurality of memory sub-arrays and a shared circuit coupled to each of the memory sub-arrays. Each memory sub-array includes at least one row circuit, at least one column circuit, and a plurality of memory cells operatively coupled to the row and column circuits. The row and column circuits are operative to provide selective access to one or more of the memory cells. The shared circuit includes circuitry, external to the memory sub-arrays, which is operative to control one or more functions of the memory sub-arrays as a function of at least one control signal supplied to the memory circuit. The memory circuit is operative, with at least one of the memory sub-arrays operative, with one or more of the memory sub-arrays powered and concurrently with one or more of the memory sub-arrays unpowered.