The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2010

Filed:

Jul. 07, 2008
Applicant:

Chih-hsin Wang, San Jose, CA (US);

Inventor:

Chih-Hsin Wang, San Jose, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/73 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device comprising a memory region including one or more transistor string arrays, a logic region including one or more logic transistors and an isolation region for isolating the logic transistors. The string array includes a plurality, T, of bipolar junction transistors. The string array includes a common collector region for the T bipolar junction transistors, a common base region for the T bipolar junction transistors, a plurality of emitters, one emitter for each of the T bipolar junction transistors, a number, B, of base contacts for the T bipolar junction transistors where the base contacts electrically couple the common base region and where the number of base contacts, B, is less than the number of transistors, T.


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