The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2010

Filed:

Jun. 17, 2009
Applicants:

Kap-soo Yoon, Seoul, KR;

Sung-hoon Yang, Seoul, KR;

Sung-ryul Kim, Cheonan-si, KR;

O-sung Seo, Seoul, KR;

Hwa-yeul OH, Seoul, KR;

Jae-ho Choi, Seoul, KR;

Seong-hun Kim, Seoul, KR;

Yong-mo Choi, Osan-si, KR;

Inventors:

Kap-Soo Yoon, Seoul, KR;

Sung-Hoon Yang, Seoul, KR;

Sung-Ryul Kim, Cheonan-si, KR;

O-Sung Seo, Seoul, KR;

Hwa-Yeul Oh, Seoul, KR;

Jae-Ho Choi, Seoul, KR;

Seong-Hun Kim, Seoul, KR;

Yong-Mo Choi, Osan-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A display substrate includes; a substrate, a gate electrode arranged on the substrate, a semiconductor pattern arranged on the gate electrode, a source electrode arranged on the semiconductor pattern, a drain electrode arranged on the semiconductor pattern and spaced apart from the source electrode, an insulating layer arranged on, and substantially covering, the source electrode and the drain electrode to cover the source electrode and the drain electrode, a conductive layer pattern arranged on the insulating layer and overlapped aligned with the semiconductor pattern, a pixel electrode electrically connected to the drain electrode, and a storage electrode arranged on the substrate and overlapped overlapping with the pixel electrode, the storage electrode being electrically connected to the conductive layer pattern.


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