The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 2010
Filed:
Jan. 11, 2008
Robert H. Bell, Austin, TX (US);
Thomas W. Chen, Austin, TX (US);
Richard J. Eickemeyer, Rochester, MI (US);
Venkat R. Indukuru, Austin, TX (US);
Pattabi M. Seshadri, Austin, TX (US);
Madhavi G. Valluri, Leander, TX (US);
Robert H. Bell, Austin, TX (US);
Thomas W. Chen, Austin, TX (US);
Richard J. Eickemeyer, Rochester, MI (US);
Venkat R. Indukuru, Austin, TX (US);
Pattabi M. Seshadri, Austin, TX (US);
Madhavi G. Valluri, Leander, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A test system or simulator includes an IC benchmark software program that executes application software on a semiconductor die IC design model. The benchmark software includes trace, simulation point, clustering and other programs. IC designers utilize the benchmark software to evaluate the performance characteristics of IC designs with customer user software applications. The benchmark software generates basic block vectors BBVs from instruction traces of application software. The benchmark software analyzes data dependent information that it appends to BBVs to create enhanced BBVs or EBBVs. The benchmark software may graph the EBBV information in a cluster diagram and selects a subset of EBBVs as a representative sample for each program phase. Benchmarking software generates a reduced application software program from the representative EBBV samples. Designers use the test system with benchmarking software to evaluate IC design model modifications by using the representative reduced application software program.