The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 2010
Filed:
Nov. 19, 2004
Tsutomu Sasao, Fukuoka, JP;
Yukihiro Iguchi, Kanagawa, JP;
Tsutomu Sasao, Fukuoka, JP;
Yukihiro Iguchi, Kanagawa, JP;
Kitakyushu Foundation for the Advancement of Industry, Science and Technology, Kitakyushu-shi, Fukuoka, JP;
Abstract
A device for logic synthesis that can be used to synthesize LUT logic circuit having intermediate outputs for multiple-output logic functions. The device includes means to store node tablestoring Binary Decision Diagram for Characteristic Function (BDD_for_CF) of the characteristic function χ(X, Y) of the multiple-output logic function f(X), means to store LUTs, means to reduce by shortingpartitioning BDD_for_CF into the subgraphs Band Bat the partition line in the height lev of the partition and executing shorten-processing, means to measure the width W of BDDscalculating the width W at the partition line, means to compute the intermediate variablescalculating the number of the intermediate variables u according to the width W, means to generate an LUTgenerating the LUT for the sub-graph B, and means to reconstruct BDDsgenerating a binary tree that has the same number of control inputs as that of the intermediate variables u, replacing the sub-graph Bwith the binary tree and reconstructing the BDD_for_CF.