The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 30, 2010

Filed:

Jan. 13, 2008
Applicants:

Hong-shin Jun, San Jose, CA (US);

Zhiyuan Wang, Fremont, CA (US);

Xinli Gu, Sunnyvale, CA (US);

Inventors:

Hong-Shin Jun, San Jose, CA (US);

Zhiyuan Wang, Fremont, CA (US);

Xinli Gu, Sunnyvale, CA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G11B 20/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clock signal within an application-specific integrated circuit (ASIC) is characterized while operating a subsystem. Subsequently, also on the ASIC, a testing clock signal is generated, based on the characterization of the operative clock signal, for purposes of testing the subsystem operating according to the testing clock signal instead of the clock signal. The ASIC includes a clock signal characterization circuit configured to characterize a clock signal within the ASIC; a programmable testing clock signal generator configured for being programmed based on said characterization of the clock signal, and for generating a test clock signal based on its said programming; and the subsystem tested when operating according to the testing clock signal instead of the clock signal.


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