The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 2010
Filed:
May. 12, 2006
James M. Simkins, Park City, UT (US);
John M. Thendean, Berkeley, CA (US);
Vasisht Mantra Vadi, San Jose, CA (US);
Bernard J. New, Carmel Valley, CA (US);
Jennifer Wong, Fremont, CA (US);
Anna Wing Wah Wong, Santa Clara, CA (US);
Alvin Y. Ching, Sunnyvale, CA (US);
James M. Simkins, Park City, UT (US);
John M. Thendean, Berkeley, CA (US);
Vasisht Mantra Vadi, San Jose, CA (US);
Bernard J. New, Carmel Valley, CA (US);
Jennifer Wong, Fremont, CA (US);
Anna Wing Wah Wong, Santa Clara, CA (US);
Alvin Y. Ching, Sunnyvale, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A digital signal processing circuit having a pre-adder circuit includes; a first register block and a pre-adder circuit coupled to a multiplier circuit and to a set of multiplexers, where the set of multiplexers are controlled by an opcode, and where the pre-adder circuit has a first adder circuit; and an arithmetic logic unit (ALU) having a second adder circuit and coupled to the set of multiplexers.