The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 2010
Filed:
Jan. 22, 2007
Shuji Ikeda, Austin, TX (US);
Jeff Wetzel, Austin, TX (US);
James Beach, Austin, TX (US);
Charles Stager, Austin, TX (US);
Michael Gotskowski, Austin, TX (US);
Andrew Collin Campbell, Austin, TX (US);
Shuji Ikeda, Austin, TX (US);
Jeff Wetzel, Austin, TX (US);
James Beach, Austin, TX (US);
Charles Stager, Austin, TX (US);
Michael Gotskowski, Austin, TX (US);
Andrew Collin Campbell, Austin, TX (US);
Advanced Technology Development Facility, Inc., Austin, TX (US);
Abstract
Methods for fabricating semiconductor structures are provided. A first layer may be deposited onto a substrate followed by the deposition of a second layer onto the first layer. A plurality of line structures may be etched in the second layer. A third layer, deposited onto the plurality of line structures of the second layer, may subsequently be etched to expose the plurality of line structures in the second layer. The plurality of line structures in the second layer may be removed, leaving an etched third layer. The etched third layer may be used as a mask to etch the first layer to form a semiconductor structure in the first layer. In some respects, the methods may include steps for etching the substrate using the etched first layer. The methods may also provide annealing the etched substrate to form a corrugate substrate surface.