The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 23, 2010
Filed:
Mar. 13, 2008
Jaime D. Lujan, Louisville, CO (US);
Mario Escobar, Boulder, CO (US);
Jaime D. Lujan, Louisville, CO (US);
Mario Escobar, Boulder, CO (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A computer-implemented method of performing timing analysis upon a circuit design having synchronous circuit elements can include selecting a destination pin having a plurality of source pins, wherein each source pin of the plurality of source pins defines a data path to the destination pin. A slack of a selected path of the data paths to the destination pin can be determined. A timing adjustment of each of the plurality of source pins can be compared to the slack of the selected path, wherein each timing adjustment is determined using static timing analysis. A simulation node can be selectively included within the circuit design according to the comparison. The circuit design can be output.