The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2010

Filed:

Aug. 14, 2007
Applicants:

Peter Altevogt, Ettlingen, DE;

Hans Boettiger, Tuebingen, DE;

Wesley M. Felter, Austin, TX (US);

Charles R. Lefurgy, Austin, TX (US);

Lutz Stiege, Lueneburg, DE;

Malcolm S. Ware, Austin, TX (US);

Inventors:

Peter Altevogt, Ettlingen, DE;

Hans Boettiger, Tuebingen, DE;

Wesley M. Felter, Austin, TX (US);

Charles R. Lefurgy, Austin, TX (US);

Lutz Stiege, Lueneburg, DE;

Malcolm S. Ware, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for autonomous dynamic voltage (v) and frequency (f) scaling (DVFS) of a microprocessor, wherein autonomous detection of phases of high microprocessor workload and prediction of their duration is performed (PID). The microprocessor frequency (f) will be temporarily increased (LUT) to an appropriate safe value (even beyond its nominal frequency) consistent with technological and ambient constraints in order to improve performance when the computer system comprising the microprocessor benefits most, while during phases of low microprocessor workload its frequency (f) and voltage (v) will be decreased to save energy. This technique exploits hidden performance capabilities and improves the total performance of a computer system without compromising operational stability. No additional hardware such as service processors is needed for contemporary computer systems supporting performance counters and DFVS already. The invention allows significantly increasing the total computer system performance with only minimal impact on power (P, P) consumption.


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