The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 23, 2010
Filed:
May. 12, 2006
James M. Simkins, Park City, UT (US);
Jennifer Wong, Fremont, CA (US);
Bernard J. New, Carmel Valley, CA (US);
Alvin Y. Ching, Sunnyvale, CA (US);
John M. Thendean, Berkeley, CA (US);
Anna Wing Wah Wong, Santa Clara, CA (US);
Vasisht Mantra Vadi, San Jose, CA (US);
James M. Simkins, Park City, UT (US);
Jennifer Wong, Fremont, CA (US);
Bernard J. New, Carmel Valley, CA (US);
Alvin Y. Ching, Sunnyvale, CA (US);
John M. Thendean, Berkeley, CA (US);
Anna Wing Wah Wong, Santa Clara, CA (US);
Vasisht Mantra Vadi, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
An integrated circuit that includes a digital signal processing element (DSPE) having a first and a second register block coupled to a first arithmetic logic unit (ALU) circuit; a middle DSPE adjacent to the top DSPE having a third and a fourth register block coupled to a second ALU circuit, where the third register block is coupled to the first register block, and the fourth register block register block is coupled to the second register block; and a bottom DSPE adjacent to the middle DSPE having a fifth and a sixth register block coupled to a third ALU circuit, where the fifth register block is coupled to the third register block and the sixth register block register block is coupled to the fourth register block.