The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2010

Filed:

Sep. 18, 2008
Applicants:

Yasushi Oka, Tokyo, JP;

Tadashi Omae, Tokyo, JP;

Takesada Akiba, Nanae, JP;

Inventors:

Yasushi Oka, Tokyo, JP;

Tadashi Omae, Tokyo, JP;

Takesada Akiba, Nanae, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 14/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The chip area of a semiconductor device including a nonvolatile memory is reduced. The semiconductor device includes a first memory cell and a second memory cell which are formed on the principal surface of a substrate, and arranged adjacent to each other. In a principal surface of the substrate, active regions which are electrically isolated from each other are arranged. In the first active region, the capacitor element of the first memory cell is arranged, while the capacitor element of the second memory cell is arranged in the fourth active region. In the second active region, the respective write/erase elements of the first and second memory cells are both arranged. Further, in the third active region, the respective read elements of the first and second memory cells are both arranged.


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