The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 23, 2010
Filed:
Jun. 03, 2009
Xiaoxin Feng, Shakopee, MN (US);
Weston Roper, Shakopee, MN (US);
James D. Seefeldt, Eden Prairie, MN (US);
Xiaoxin Feng, Shakopee, MN (US);
Weston Roper, Shakopee, MN (US);
James D. Seefeldt, Eden Prairie, MN (US);
Honeywell International Inc., Morristown, NJ (US);
Abstract
In general, this disclosure is directed to a duty cycle correction (DCC) circuit that adjusts a falling edge of a clock signal to achieve a desired duty cycle. In some examples, the DCC circuit may generate a pulse in response to a falling edge of an input clock signal, delay the pulse based on a control voltage, adjust the falling edge of the input clock signal based on the delayed pulse to produce an output clock signal, and adjust the control voltage based on the difference between a duty cycle of the output clock signal and a desired duty cycle. Since the DCC circuit adjusts the falling edge of the clock cycle to achieve a desired duty cycle, the DCC may be incorporated into existing PLL control loops that adjust the rising edge of a clock signal without interfering with the operation of such PLL control loops.