The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 23, 2010
Filed:
Sep. 23, 2005
Andrew J. Walker, Mountain View, CA (US);
Helmut Puchner, Santa Clara, CA (US);
Harold M. Kutz, Snoqualmie, WA (US);
James H. Shutt, Bothell, WA (US);
Andrew J. Walker, Mountain View, CA (US);
Helmut Puchner, Santa Clara, CA (US);
Harold M. Kutz, Snoqualmie, WA (US);
James H. Shutt, Bothell, WA (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
Circuits including a laterally diffused output driver transistor and a distinct device configured to provide electrostatic discharge (ESD) protection for the laterally diffused output driver transistor are presented. In general, the device configured to provide ESD protection includes a drain extended metal oxide semiconductor transistor (DEMOS) transistor configured to breakdown at a lower voltage than a breakdown voltage of the laterally diffused output driver transistor. The laterally diffused output driver transistor may be a pull-down or a pull-up output driver transistor. The device also includes a silicon controlled rectifier (SCR) configured to inject charge within a semiconductor layer of the circuit upon breakdown of the DEMOS transistor. Moreover, the device includes a region configured to collect the charge injected from the SCR and further includes an ohmic contact region configured to at least partially affect the holding voltage of the SCR.