The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2010

Filed:

Apr. 17, 2009
Applicants:

Liang-pin Tai, Tainan, TW;

Jing-meng Liu, Hsinchu, TW;

Hung-der Su, Luju Township, Kaohsiung County, TW;

Inventors:

Liang-Pin Tai, Tainan, TW;

Jing-Meng Liu, Hsinchu, TW;

Hung-Der Su, Luju Township, Kaohsiung County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/74 (2006.01); H01L 31/111 (2006.01);
U.S. Cl.
CPC ...
Abstract

A single-chip common-drain JFET device comprises a Drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.


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