The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2010

Filed:

Mar. 09, 2007
Applicants:

Wibo D. Van Noort, Wappingers Falls, NY (US);

Jan Zonsky, Leuven, BE;

Andreas M. Piontek, Leuven, BE;

Inventors:

Wibo D. Van Noort, Wappingers Falls, NY (US);

Jan Zonsky, Leuven, BE;

Andreas M. Piontek, Leuven, BE;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/331 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention relates to a method of manufacturing a bipolar transistor on a semiconductor substrate () which is provided with a first, a second and a third layer () of a first, second and third semiconductor material respectively, all of a first conductivity type. A first portion of the second layer () is transformed into a buried isolation region () comprising a first electrically insulating material. A first semiconductor region () of the first conductivity type, comprising, for example, a collector region, is formed from a second portion of the second layer () adjoining the buried isolation region () and a portion of the first layer () adjoining the second portion of the second layer (). Then a base region () is formed on the buried isolation region () and on the first semiconductor region () by transforming the third layer () into a second conductivity type, which is opposite to the first conductivity type. Thereafter a second semiconductor region () of the first conductivity type, comprising, for example, an emitter region, is formed on a part of the base region (). This method provides for the formation of a bipolar transistor with an advantageous decrease of the extrinsic collector to base region () capacitance by the fact that the value of this capacitance is mainly determined by the buried isolation region () which has a substantially lower dielectric constant than that of the collector to base region () junction.


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