The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 16, 2010
Filed:
Dec. 29, 2006
Willy Obereiner, San Jose, CA (US);
Venkat Natarajan, Cupertino, CA (US);
Jeremy Isaac Nathaniel Werner, San Jose, CA (US);
Joe Yuen Tom, Foster City, CA (US);
Hyun Soo Lee, Ithaca, NY (US);
Willy Obereiner, San Jose, CA (US);
Venkat Natarajan, Cupertino, CA (US);
Jeremy Isaac Nathaniel Werner, San Jose, CA (US);
Joe Yuen Tom, Foster City, CA (US);
Hyun Soo Lee, Ithaca, NY (US);
Spansion LLC, Sunnyvale, CA (US);
Abstract
Systems and methods that facilitate processing data and securing data written to or read from memory. A processor can include a host memory interface that monitors all bus traffic between a host processor and memory. The host memory interface can analyze commands generated by the host processor and determine the validity of the commands. Valid commands can proceed for further analysis; invalid commands can be aborted, for example, with the host memory interface and memory each set to an idle state. The host memory interface can analyze authentication information obtained via an authentication component, and information regarding memory partition rights, to determine whether a command partition violation exists as to the command. If a violation exists, the host memory interface can prevent the improper command from executing in the memory, and can cause a different operation to occur thereby allowing the memory to be placed in a known state.