The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2010

Filed:

Dec. 19, 2007
Applicants:

Robert John Dorsey, Durham, NC (US);

Jason Alan Cox, Raleigh, NC (US);

Hien Minh Le, Cedar Park, TX (US);

Richard Nicholas, Round Rock, TX (US);

Eric Francis Robinson, Raleigh, NC (US);

Thuong Quang Truong, Austin, TX (US);

Inventors:

Robert John Dorsey, Durham, NC (US);

Jason Alan Cox, Raleigh, NC (US);

Hien Minh Le, Cedar Park, TX (US);

Richard Nicholas, Round Rock, TX (US);

Eric Francis Robinson, Raleigh, NC (US);

Thuong Quang Truong, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for managing a cache operates in a data processing system with a system memory and a plurality of processing units (PUs). A first PU determines that one of a plurality of cache lines in a first cache of the first PU must be replaced with a first data block, and determines whether the first data block is a victim cache line from another one of the plurality of PUs. In the event the first data block is not a victim cache line from another one of the plurality of PUs, the first cache does not contain a cache line in coherency state invalid, and the first cache contains a cache line in coherency state moved, the first PU selects a cache line in coherency state moved, stores the first data block in the selected cache line and updates the coherency state of the first data block.


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