Interface arrangement for a system on a chip suitable for outputting higher-frequency signals for operating peripheral devices, and use thereof

Abstract

An interface arrangement () is disclosed that provides an interface between a signal line () for connecting external peripheral devices and a microcontroller bus (). Data input and output interfaces () are provided for connecting corresponding register units () to the bus systems () and are connected through a buffer memory (). This is, moreover, coupled with a direct memory access (DMA) controller (). A control signal generator is also provided for the flexible generation of control signals (). The proposed arrangement thus permits a high data transfer rate when operating peripheral devices with a system-on-chip, without demanding computing time from the microcontroller.