The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2010

Filed:

Oct. 15, 2008
Applicant:

Michiel Antonius Petrus Pertijs, 's Hertogenbosch, NL;

Inventor:

Michiel Antonius Petrus Pertijs, 's Hertogenbosch, NL;

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus includes a plurality of amplifier stages configured to receive an input voltage and generate an amplified output current. Each amplifier stage includes a transconductance stage configured to receive the input voltage and generate a first intermediate output current. Each amplifier stage also includes an auto-zeroing loop configured to generate a second intermediate output current that at least partially corrects for an offset of the transconductance stage, where the auto-zeroing loop operates at a first frequency. Each amplifier stage further includes chopping circuitry configured to reverse a polarity of the input voltage and a polarity of the amplified output current at a second frequency, where the second frequency is less than the first frequency. Each amplifier stage is configured to operate in auto-zeroing and amplification phases. At least one amplifier stage operates in the auto-zeroing phase when at least one other amplifier stage operates in the amplification phase.


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