The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2010

Filed:

Apr. 24, 2006
Applicant:

Myron Wai Wong, Fremont, CA (US);

Inventor:

Myron Wai Wong, Fremont, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03B 1/00 (2006.01); H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A buffer circuit is disclosed. In one embodiment, the buffer circuit includes a preconditioning circuit and a driver circuit. The preconditioning circuit generates a pre-charge signal in response to receiving an input signal. After a predetermined duration, or when the pre-charge circuit reaches a threshold output signal level, the input signal is coupled to an input of the driver circuit. The output signal of the driver circuit is combined with the output signal of the preconditioning circuit to form a composite output signal of the buffer circuit. In one embodiment, the pre-charge signal is used to lower the effective VDS across the transistors of the driver circuit to reduce hot-carrier injection, and therefore reduce transistor performance degradation.


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