The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 16, 2010
Filed:
Dec. 18, 2008
Hee Bae Lee, Bucheon Si, KR;
Hee Bae Lee, Bucheon Si, KR;
Dongbu Hitek Co., Ltd., Seoul, KR;
Abstract
Methods for manufacturing semiconductor devices simultaneously to implement low-voltage and high-voltage devices in a single chip. In one example embodiment, a method includes various acts. An isolation layer is formed on a wafer. A gate oxide layer and a lower gate poly are sequentially formed on a first low-voltage transistor region. A first poly oxide layer is formed. A nitride layer is formed on the first poly oxide layer. The nitride layer and the first poly oxide layer are etched. A field oxide layer is formed by selectively oxidizing portions exposed by the etching. A second poly oxide layer is formed. Gate patterns of each transistor region are completed by vapor-depositing an upper gate poly on a high-voltage transistor region, the first low-voltage transistor region and a second low-voltage transistor region. A source and drain region are formed.