The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 2010

Filed:

Oct. 30, 2006
Applicant:

Kazunari Takasugi, Kanagawa, JP;

Inventor:

Kazunari Takasugi, Kanagawa, JP;

Assignee:

NEC Electronics Corporation, Kawasaki, Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/28 (2006.01); G09G 3/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

An output buffer circuit constituted by a totem-pole circuit where two NchMOS transistors are cascade-connected, and the connection point of the two MOS transistors are connected to a data electrode of a display cell, improves the power recovery rate of a driver device of a PDP. A level shift circuit includes a CMOS circuit and drives the output buffer circuit. An electric charge recovery circuit connected to a power supply of the output buffer circuit recovers and reuses electric charges remaining on the data electrode after the discharge of the display cells. A power supply control circuit controls so that the power supply voltage of the level shift circuit is higher than the sum of the power supply voltage of the output buffer circuit and the threshold voltage of the MOS transistors for a period of time during a recovery/reuse cycle of the electric charge recovery circuit.


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