The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 09, 2010
Filed:
Jul. 28, 2006
Yutaka Yamada, Osaka, JP;
Takeshi Kishida, Osaka, JP;
Yoshikazu Tamura, Osaka, JP;
Yasuo Sogawa, Osaka, JP;
Masanori Hirofuji, Osaka, JP;
Yutaka Yamada, Osaka, JP;
Takeshi Kishida, Osaka, JP;
Yoshikazu Tamura, Osaka, JP;
Yasuo Sogawa, Osaka, JP;
Masanori Hirofuji, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
There is provided a semiconductor device adopting, as a layout of pads connected to an external package on an LSI, a zigzag pad layout in which the pads are arranged shifted alternately, which can avoid occurrences of short-circuiting of wires, an increase in chip size due to avoidance of short-circuiting, propagation of power supply or GND noise due to reduction in IO cell interval, and signal transmission delay difference due to displacement of pad positions. In a semiconductor device wherein plural pads on a semiconductor element which are connected to function terminals on an external package are arranged in two lines along the periphery of the semiconductor element, an arrangement order of the plural pads on the semiconductor element is different from an arrangement order of the function terminals on the external package.