The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 2010

Filed:

Aug. 28, 2007
Applicants:

Raymond Albert Fillion, Niskayuna, NY (US);

Richard Alfred Beaupre, Pittsfield, MA (US);

Ahmed Elasser, Latham, NY (US);

Robert John Wojnarowski, Ballston Lake, NY (US);

Charles Steven Korman, Schenectady, NY (US);

Inventors:

Raymond Albert Fillion, Niskayuna, NY (US);

Richard Alfred Beaupre, Pittsfield, MA (US);

Ahmed Elasser, Latham, NY (US);

Robert John Wojnarowski, Ballston Lake, NY (US);

Charles Steven Korman, Schenectady, NY (US);

Assignee:

General Electric Company, Niskayuna, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor chip packaging structure is fabricated by using a dielectric film with two surfaces, and a power semiconductor chip with an active surface having contact pads. An adhesive layer is used to connect the first surface of the dielectric film and the active surface of the power semiconductor chip. A patterned electrically conductive layer is formed adjacent to the second surface of the film, extending through holes in the film to the contact pads.


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