The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 02, 2010
Filed:
Oct. 30, 2007
Kouichi Matsumoto, Tokyo, JP;
Kouichi Matsumoto, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A fault tolerant computer comprises a first unit, a second unit, a delay buffer and a delay time setting unit. The first unit executes a computer program in response to an input signal. The second unit executes the computer program in the same execution environment as the first unit in response to the input signal. The delay buffer controls a delay time of a timing when the input signal is input to the first unit with respect to a timing when the input signal is input to the second unit. The delay time setting unit sets the delay time to zero when receiving a synchronization mode signal and sets the delay time to be larger than zero when receiving a delay mode signal.