The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 02, 2010
Filed:
Aug. 31, 2007
Lakshminarayana B. Arimilli, Austin, TX (US);
Ravi K. Arimilli, Austin, TX (US);
Bernard C. Drerup, Austin, TX (US);
Jody B. Joyner, Austin, TX (US);
Jerry D. Lewis, Round Rock, TX (US);
Lakshminarayana B. Arimilli, Austin, TX (US);
Ravi K. Arimilli, Austin, TX (US);
Bernard C. Drerup, Austin, TX (US);
Jody B. Joyner, Austin, TX (US);
Jerry D. Lewis, Round Rock, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system for providing a cluster-wide system clock in a multi-tiered full graph (MTFG) interconnect architecture are provided. Heartbeat signals transmitted by each of the processor chips in the computing cluster are synchronized. Internal system clock signals are generated in each of the processor chips based on the synchronized heartbeat signals. As a result, the internal system clock signals of each of the processor chips are synchronized since the heartbeat signals, that are the basis for the internal system clock signals, are synchronized. Mechanisms are provided for performing such synchronization using direct couplings of processor chips within the same processor book, different processor books in the same supernode, and different processor books in different supernodes of the MTFG interconnect architecture.