The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2010

Filed:

Aug. 02, 2007
Applicants:

Gheorghe Almasi, Ardsley, NY (US);

Charles J. Archer, Rochester, MN (US);

Joseph D. Ratterman, Rochester, MN (US);

Brian E. Smith, Rochester, MN (US);

Inventors:

Gheorghe Almasi, Ardsley, NY (US);

Charles J. Archer, Rochester, MN (US);

Joseph D. Ratterman, Rochester, MN (US);

Brian E. Smith, Rochester, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A parallel computer comprises a plurality of compute nodes organized into at least one operational group for collective parallel operations. Each compute node is assigned a unique rank and is coupled for data communications through a global combining network. One compute node is assigned to be a logical root. A send buffer and a receive buffer is configured. Each element of a contribution of the logical root in the send buffer is contributed. One or more zeros corresponding to a size of the element are injected. An allreduce operation with a bitwise OR using the element and the injected zeros is performed. And the result for the allreduce operation is determined and stored in each receive buffer.


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