The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 02, 2010
Filed:
Jun. 05, 2006
Olaf Manczak, Hayward, CA (US);
Christopher A. Vick, San Jose, CA (US);
Michael H. Paleczny, San Jose, CA (US);
Jay R. Freeman, Palo Alto, CA (US);
Phyllis E. Gustafson, Pleasanton, CA (US);
Olaf Manczak, Hayward, CA (US);
Christopher A. Vick, San Jose, CA (US);
Michael H. Paleczny, San Jose, CA (US);
Jay R. Freeman, Palo Alto, CA (US);
Phyllis E. Gustafson, Pleasanton, CA (US);
Oracle America, Inc., Redwood City, CA (US);
Abstract
A computer system may employ a first memory virtualization and corresponding virtual-to-physical address translation technique for a first application executing on a processor and a second memory virtualization and corresponding virtual-to-physical address translation technique for a second application executing on the same processor transparent to the first application. Different virtualization and corresponding translation techniques may be employed on a per-thread basis, rather than a per-application basis. Different virtualization and corresponding translation techniques may be employed for accesses to different ranges of virtual or corresponding physical addresses. Different virtualization and corresponding translation techniques may employ different page sizes. A first or second virtualization and corresponding translation technique may include page-based, segment-based, or function-based virtual-to-physical address translation. The selection of a first or second memory virtualization and corresponding address translation technique may be dependent on a predicted workload and/or on a user policy.