The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2010

Filed:

Mar. 10, 2006
Applicants:

Shinji Yamashita, Kumamoto, JP;

Yuichi Masutani, Tokyo, JP;

Shingo Nagano, Tokyo, JP;

Inventors:

Shinji Yamashita, Kumamoto, JP;

Yuichi Masutani, Tokyo, JP;

Shingo Nagano, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semi-transparent TFT array substrate has a TFT including a source electrode, a gate electrode, and a drain electrode. The substrate also has an auxiliary capacitive wiring and a reflective pixel electrode. Further, the substrate has a transparent pixel electrode including an electrode extending from a corner of the rest of the transparent pixel electrode to an edge of the auxiliary capacitive wiring closest to a gate wiring connected to the gate electrode. In addition, the substrate has a source wiring connected to the source electrode. The auxiliary capacitive wiring overlaps a space existing between the reflective pixel electrode and the source wiring. The electrode is disposed between the reflective pixel electrode and the source wiring. A connection which connects the electrode and the rest of the transparent pixel electrode does not overlap the auxiliary capacitive wiring in a plan view. The connection does not overlap the gate wiring.


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