The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2010

Filed:

Feb. 18, 2009
Applicants:

Ravindraraj Ramaraju, Round Rock, TX (US);

David R. Bearden, Austin, TX (US);

Kenneth R. Burch, Austin, TX (US);

Charles E. Seaberg, Austin, TX (US);

Inventors:

Ravindraraj Ramaraju, Round Rock, TX (US);

David R. Bearden, Austin, TX (US);

Kenneth R. Burch, Austin, TX (US);

Charles E. Seaberg, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit has a first transistor having a first current electrode coupled to a first supply voltage terminal and a second current electrode coupled to a virtual supply voltage node. A second transistor has a first current electrode coupled to the first supply voltage terminal and a control electrode coupled to the virtual supply voltage node. A first load has an input and has an output coupled to a second current electrode of the second transistor. A third transistor has a control electrode coupled to the output of the first load. A second load has an input coupled to the first supply voltage terminal, and has an output that is coupled to both a control electrode of the first transistor and a first current electrode of the third transistor. The virtual supply voltage node provides an operating voltage to a circuit module that alternates between normal and drowsy operating modes.


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