The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7825471 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 02, 2010

Filed:

Jul. 24, 2008
Applicant:

Shinobu Asayama, Kanagawa, JP;

Inventor:

Shinobu Asayama, Kanagawa, JP;

Assignee:

NEC Electronics Corporation, Kawasaki, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/01 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device includes a first well region of a first conductivity type, first and second SRAM cells adjacently arranged to each other, the first and second SRAM cells each including at least a first transfer transistor and a drive transistor formed on the first well, the first transfer transistor and the drive transistor being coupled in series between a bit line and a power source line, and a first diffusion region of the first conductivity type arranged between the drive transistor of the first SRAM cell and the drive transistor of the second SRAM cell, to apply a first well potential to the first well.


Find Patent Forward Citations

Asayama, Shinobu. (2010). Semiconductor memory device including sram cell having well power potential supply region provided therein (U.S. Patent No. 7825471). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7825471

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