Method for enhancing field oxide

Abstract

A CMOS device with polysilicon protection tiles is shown in FIG.. LOCOS regionsandseparate adjacent active regionsfromandfrom, respectively. On the upper surface of the LOCOS regionsare polysilicon tiles, respectively. At the corner of the gate polysiliconand the polysilicon tilesandare oxide spacers-. The polysilicon tileshave silicide layers. Other silicide layers-are on the tops of the source, drain and polysilicon gate. An insulation layercovers the substrate and metal contactsextend from the surface of the layerto the silicide layers on the source, gate and drain, respectively. The polysilicon tiles are made from the same layer of polysilicon as the gate and they are formed simultaneously with the gates. The intention of the polysilicon tiles is to reduce erosion of the field oxide between closely spaced active regions. In addition, the poly tiles themselves increase the thickness of the isolation between active silicon regions when it must serve as a self-aligned blocking layer for an ion implantation step.