The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2010

Filed:

May. 15, 2007
Applicants:

David D. Litten, Jericho, VT (US);

Steven F. Oakland, Colchester, VT (US);

Inventors:

David D. Litten, Jericho, VT (US);

Steven F. Oakland, Colchester, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system and methods of balancing scan chains and, more particularly, a system and methods of load balancing scan chains into hierarchically designed integrated circuits. The method includes estimating or calculating a maximum scan chain length L and creating a maximum number of scan chains of length L in each hierarchical block. The method further includes distributing remaining scan bits in each hierarchical block into additional scan chains, and creating chip-level scan chains by using the scan chains of maximum length L and by forming additional chip-level scan chains of maximum length L by distributing the additional scan chains of maximum length LR, plus any remaining top-level scan bits, among the additional chip-level scan chains of maximum length L.


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