The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7822589 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 26, 2010

Filed:

Jul. 15, 2003
Applicants:

Rajarshi Bhattacharya, Karnataka, IN;

Sriram Gorti, Bangalore, IN;

Vinoj N. Kumar, Austin, TX (US);

Chandramouleeswaran Sankaran, Bangalore, IN;

Tirthendu Sarkar, Bangalore, IN;

Inventors:

Rajarshi Bhattacharya, Karnataka, IN;

Sriram Gorti, Bangalore, IN;

Vinoj N. Kumar, Austin, TX (US);

Chandramouleeswaran Sankaran, Bangalore, IN;

Tirthendu Sarkar, Bangalore, IN;

Assignee:

Agere Systems Inc., Allentown, PA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A software-based development tool is operative to automatically determine an appropriate simulation configuration for a multistage switch fabric or other multiple circuit element electronic system. The development tool includes an interface permitting user control of one or more configurable parameters of the electronic system, and automatically generates a simulation configuration for the electronic system based on current values of the configurable parameters. The simulation configuration is advantageously generated without requiring further user input, and specifies interconnections between the circuit elements which satisfy the current values of the configurable parameters.


Find Patent Forward Citations

Bhattacharya, Rajarshi. (2010). Method and apparatus for automatic generation of multiple integrated circuit simulation configuration (U.S. Patent No. 7822589). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7822589

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