The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2010

Filed:

Sep. 24, 2003
Applicants:

Akihiko Mochida, Hino, JP;

Katsuyuki Saito, Sagamihara, JP;

Makoto Tsunakawa, Toda, JP;

Noboru Kusamura, Hino, JP;

Kotaro Ogasawara, Tokyo, JP;

Hideki Tashiro, Tokyo, JP;

Inventors:

Akihiko Mochida, Hino, JP;

Katsuyuki Saito, Sagamihara, JP;

Makoto Tsunakawa, Toda, JP;

Noboru Kusamura, Hino, JP;

Kotaro Ogasawara, Tokyo, JP;

Hideki Tashiro, Tokyo, JP;

Assignee:

Olympus Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
A62B 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

To provide an image pickup system having CCDsdriven at different frequencies respectively which can drive each CCDwith a predetermined frequency if a detachable camera head (or electronic endoscope)is used and also can process a signal processing clock of a video processing circuitwith one type of clock. A drive signal of the predetermined frequency supplied to the CCD is produced via a generating circuit CXOin the video processing circuit, a frequency dividing circuitand a timing generator (T.G.). A CCD signal outputted from the CCDis inputted to a line memoryin a floating circuit. As a writing clock (WCK) of the line memory, the one which is divided in the frequency dividing circuitto a frequency in accordance with the CCDto be used is used, and as a reading clock (RCK), the one of one type of frequency is used without regard to the CCDto be used. Hence, it is possible to perform the signal processing of a secondary circuitof the line memoryand following ones always with a common generating clock.


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