The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 26, 2010
Filed:
Apr. 21, 2005
Applicant:
Vidya Kaushik, Hoeilaart, BE;
Inventor:
Vidya Kaushik, Hoeilaart, BE;
Assignee:
Freescale Semiconductor, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/3205 (2006.01);
U.S. Cl.
CPC ...
Abstract
A polycrystalline silicon layer is deposited on a gate dielectric and then a portion thereof is re-oxidized so as to form a thin layer of oxide between the poly-Si layer and the underlying gate dielectric. Subsequently, the poly-Si layer is converted to a fully-silicided form so as to produce a FUSI gate. The gate dielectric can be a high-k material, for example a Hf-containing material, or SION, or another non-SiOdielectric. The barrier oxide layer is preferably less than 1 nm thick.