The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 2010
Filed:
Jun. 01, 2007
Meei-ling Chiang, Saratoga, CA (US);
Dwight K. Elvey, Sunnyvale, CA (US);
Sanjeev Maheshwari, San Jose, CA (US);
Emerson S. Fang, Fremont, CA (US);
Meei-Ling Chiang, Saratoga, CA (US);
Dwight K. Elvey, Sunnyvale, CA (US);
Sanjeev Maheshwari, San Jose, CA (US);
Emerson S. Fang, Fremont, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
An integrated circuit includes a variable delay circuit configured to generate at least one delayed clock signal based on a first clock signal and a first control signal. The integrated circuit includes a control circuit configured to generate a count value based on a second input signal and a second control signal. The first clock signal is a first version of the at least one delayed clock signal. At least one of the second input signal and the second control signal is a second version of the at least one delayed clock signal and the count value is indicative of a frequency characteristic of the at least one delayed clock signal. The integrated circuit is configured to monotonically vary the first control signal over a range of values and the count value is determined for individual values of the control signal.