Pc-based computing system employing a silicon chip having a routing unit and a control unit for parallelizing multiple gpu-driven pipeline cores according to the object division mode of parallel operation during the running of a graphics application

Abstract

A PC-based computing system employing a silicon chip having a routing unit and a control unit for parallelizing multiple GPU-driven pipeline cores according to an object division mode of parallel operation, during the running of a graphics application. The PC-based computing system includes system memory for storing software graphics applications, software drivers and graphics libraries, and an operating system (OS), stored in the system memory, and a central processing unit (CPU), for executing the OS, graphics applications, drivers and graphics libraries. The system also includes a CPU/memory interface module, a CPU bus, a silicon chip of monolithic construction interfaced with the CPU/memory interface module by way of the CPU bus. The routing unit (i) routes the stream of geometrical data and graphic commands from the graphics application to one or more of the GPU-driven pipeline cores, and (ii) routes pixel data output from one or more of GPU-driven pipeline cores during the composition of frames of pixel data corresponding to final images for display on the display surface. The control unit accepts commands from the software multi-pipe drivers, and controls components within the silicon chip, including the routing unit.