The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 2010

Filed:

May. 12, 2009
Applicants:

John K. Jennings, Dublin, IE;

James Karp, Saratoga, CA (US);

Vassili Kireev, Sunnyvale, CA (US);

Patrick J. Quinn, Dublin, IE;

Inventors:

John K. Jennings, Dublin, IE;

James Karp, Saratoga, CA (US);

Vassili Kireev, Sunnyvale, CA (US);

Patrick J. Quinn, Dublin, IE;

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit includes a pass gate having an input and an output. An NMOS pass transistor is connected between the input and the output. The drain of the NMOS pass transistor is connected to the input and the source of the NMOS pass transistor is connected to a node between the source of the NMOS transistor and the output of the pass gate. A current clamp is connected between the node and a current sink so as to conduct current to the current sink when the node reaches a threshold value.


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