The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 2010
Filed:
Aug. 07, 2006
Lakshmi N. Ramanathan, Chandler, AZ (US);
Tien Yu T. Lee, Phoenix, AZ (US);
Jinbang Tang, Chandler, AZ (US);
Lakshmi N. Ramanathan, Chandler, AZ (US);
Tien Yu T. Lee, Phoenix, AZ (US);
Jinbang Tang, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
An electronic device can include an interconnect level () including a bonding pad region (). An insulating layer () can overlie the interconnect level () and include an opening () over the bonding pad region (). In one embodiment, a conductive stud () can lie within the opening () and can be substantially encapsulated. In another embodiment, the electronic device can include a barrier layer () lying along a side and a bottom of the opening () and a conductive stud () lying within the opening (). The conductive stud () can substantially fill the opening (). A majority of the conductive stud () can lie within the opening (). In still another embodiment, a process for forming an electronic device can include forming a conductive stud () within the opening () wherein the conductive stud () lies substantially completely within the opening (). The process can also include forming a second barrier layer () overlying the conductive stud ().